ARMv6-M MOV Instruction Limitations and High Register Access
The ARMv6-M architecture, a subset of the ARMv6 architecture designed for microcontrollers, imposes certain limitations on instruction encoding and register usage to optimize for low-power and cost-sensitive applications. One such limitation is documented in the ARMv6-M Architecture Reference Manual, specifically in section "A6.7.40 MOV (register)" on page A6-140. The manual states that the T1 encoding of the MOV instruction is only available if both the source and destination registers are from the low registers (R0-R7). This implies that high registers (R8-R15) cannot be used as operands in the MOV instruction under the ARMv6-M architecture.
However, empirical evidence suggests otherwise. When the instruction MOV r15, r14 is assembled using the arm-none-eabi-as assembler with the -march=armv6-m flag, the assembler successfully generates the corresponding machine code without any errors or warnings. This discrepancy raises questions about the accuracy of the ARMv6-M Architecture Reference Manual. The generated machine code, when disassembled using arm-none-eabi-objdump, reveals the instruction 46f7, which corresponds to mov pc, lr. This indicates that the assembler interprets the MOV instruction as valid even when high registers are involved.
The confusion is further compounded by external sources, such as a Stack Overflow answer, which claims that high register access is indeed possible on the ARMv6-M architecture. This contradiction between the reference manual, empirical results, and external sources necessitates a thorough investigation into the actual capabilities of the ARMv6-M architecture regarding MOV instructions and high register usage.
Documentation Error vs. Misinterpretation of the ARMv6-M Reference Manual
The core of the issue lies in determining whether the ARMv6-M Architecture Reference Manual contains an error or if the manual is being misinterpreted. The manual explicitly states that the T1 encoding of the MOV instruction is restricted to low registers (R0-R7) when operating under the ARMv6-M architecture. This restriction is likely in place to simplify the instruction set and reduce the complexity of the processor, which is a common design goal for microcontroller-class processors.
However, the successful assembly of the MOV r15, r14 instruction suggests that the assembler, and by extension the ARMv6-M architecture, may support MOV operations involving high registers. This could indicate one of two possibilities: either the reference manual contains an error, or the assembler is implementing a behavior that is not officially documented.
To further complicate matters, the Stack Overflow answer referenced in the discussion claims that high register access is possible on the ARMv6-M architecture. This external source, while not authoritative, adds weight to the argument that the reference manual may be incorrect or incomplete. The discrepancy between the manual and real-world behavior could be due to an oversight in the documentation, or it could be a case of the assembler implementing a feature that is not officially supported by the architecture.
Resolving the MOV Instruction High Register Usage Discrepancy
To resolve the discrepancy between the ARMv6-M Architecture Reference Manual and the observed behavior of the arm-none-eabi-as assembler, a systematic approach is required. The first step is to verify the actual capabilities of the ARMv6-M architecture by consulting additional authoritative sources, such as errata documents, technical notes, or direct communication with ARM Holdings. If no additional documentation is available, the next step is to conduct empirical testing on actual ARMv6-M hardware to determine whether the MOV instruction with high registers is indeed supported.
If empirical testing confirms that the MOV instruction with high registers is supported, then the ARMv6-M Architecture Reference Manual should be updated to reflect this capability. This would involve reporting the documentation error to ARM Holdings through the appropriate channels, such as the email address noted in the manual. The process of reporting documentation errors typically involves providing detailed evidence, such as the assembler output and disassembly, to support the claim.
In the meantime, developers working with the ARMv6-M architecture should be aware of this discrepancy and exercise caution when using MOV instructions with high registers. While the assembler may support such operations, relying on undocumented behavior can lead to compatibility issues if the behavior changes in future revisions of the architecture or toolchain. Developers should also consider using alternative instructions or techniques to achieve the desired functionality without relying on potentially unsupported features.
In conclusion, the issue of MOV instruction usage with high registers in the ARMv6-M architecture highlights the importance of thorough documentation and empirical verification. By systematically investigating the discrepancy and taking appropriate action, developers can ensure that their code is both correct and future-proof.
