ARM Cortex-M4 Input Capture Mechanism and TIM3 Configuration
The issue revolves around the failure of the input capture mechanism on TIM3 Channel 1 of the STM32F446RE microcontroller. The input capture feature is designed to measure the time between edges of an external signal, which is particularly useful for applications like PWM frequency measurement. The STM32F446RE microcontroller, based on the ARM Cortex-M4 architecture, utilizes a sophisticated timer peripheral system that includes input capture channels. These channels are configured to capture the timer counter value when a specific edge (rising, falling, or both) is detected on the corresponding input pin.
In the provided code, the input capture is set up on TIM3 Channel 1, which is mapped to GPIO pin PA6. The timer is configured to operate with no prescaler, meaning it increments at the system clock frequency (8 MHz in this case). The input capture is set to trigger on every edge of the input signal, and the captured value is stored in the TIM3_CCR1 register. The code then calculates the frequency of the input signal by measuring the time difference between two consecutive captures.
The core issue is that the code gets stuck in the loop while(!(TIM3 ->SR & (1 << 1)));, which is waiting for the capture event flag (CC1IF) to be set. This indicates that the input capture event is not occurring as expected, preventing the code from proceeding to calculate the frequency.
Misconfigured GPIO Alternate Function and Timer Settings
One of the primary causes of the input capture failure is the misconfiguration of the GPIO alternate function and timer settings. The GPIO pin PA6 must be correctly configured to operate in alternate function mode, specifically mapped to TIM3 Channel 1. The alternate function mapping is controlled by the GPIO alternate function registers (GPIOA_AFR[0] and GPIOA_AFR[1]). In the provided code, the alternate function is set to AF1 (0001) for PA6, which is correct for TIM3 Channel 1. However, the GPIO mode register (GPIOA_MODER) is not fully configured to ensure that PA6 is in alternate function mode. The code sets bit 13 of GPIOA_MODER but does not clear bit 12, which could lead to an incorrect mode configuration.
Additionally, the timer configuration might be incomplete or incorrect. The timer control register 1 (TIM3_CR1) is set to enable the counter, but other critical settings such as the clock division, auto-reload preload, and counter direction are not explicitly configured. The input capture mode is set in the capture/compare mode register 1 (TIM3_CCMR1), but the filter settings and prescaler for the input capture are left at their default values, which might not be suitable for the specific input signal characteristics.
Another potential issue is the lack of proper initialization and synchronization of the timer peripheral. The timer might not be properly reset or started, leading to unpredictable behavior. The input capture event flag (CC1IF) might not be set if the timer is not running or if the input signal is not properly connected or conditioned.
Correcting GPIO and Timer Configuration for Reliable Input Capture
To resolve the input capture failure, the GPIO and timer configurations must be carefully reviewed and corrected. The GPIO pin PA6 should be fully configured in alternate function mode by setting the appropriate bits in the GPIO mode register (GPIOA_MODER). Specifically, both bits 12 and 13 should be set to ensure that PA6 is in alternate function mode. The alternate function mapping should be confirmed to be AF1 for TIM3 Channel 1.
The timer configuration should be thoroughly reviewed to ensure that all necessary settings are correctly applied. The clock division, auto-reload preload, and counter direction should be explicitly set in the timer control register 1 (TIM3_CR1). The input capture mode should be configured with appropriate filter settings and prescaler values in the capture/compare mode register 1 (TIM3_CCMR1). The filter settings should be chosen based on the expected noise and signal characteristics to ensure reliable edge detection.
The timer should be properly initialized and started before waiting for the input capture event. This includes resetting the timer counter, enabling the timer, and ensuring that the input capture channel is correctly configured and enabled. The input signal should be verified to be properly connected and conditioned, with appropriate pull-up or pull-down resistors if necessary.
Once the GPIO and timer configurations are corrected, the input capture mechanism should function as expected, allowing the code to proceed with the frequency calculation. The following table summarizes the key configuration settings for the GPIO and timer:
| Register | Bit(s) | Value | Description |
|---|---|---|---|
| GPIOA_MODER | 12-13 | 0b10 | Configure PA6 in alternate function mode |
| GPIOA_AFR[0] | 24-27 | 0b0001 | Map PA6 to TIM3 Channel 1 (AF1) |
| TIM3_CR1 | 0 | 1 | Enable the timer counter |
| TIM3_CCMR1 | 0-1 | 0b01 | Configure CC1 channel as input, IC1 mapped on TI1 |
| TIM3_CCMR1 | 4-7 | 0b0000 | No filter, sampling at fDTS |
| TIM3_CCMR1 | 2-3 | 0b00 | No prescaler, capture on every edge |
| TIM3_CCER | 0 | 1 | Enable capture on CC1 |
By carefully reviewing and correcting these configurations, the input capture mechanism should function reliably, allowing the code to accurately measure the PWM frequency.
