AMBA AXI Reset Implementation and Synchronization Challenges
AMBA AXI Reset Signal Assertion and De-assertion Requirements The AMBA AXI protocol specifies a single active LOW reset signal, ARESETn, which plays a critical role in initializing the AXI components within a system-on-chip (SoC). According to the AXI protocol specification (IHI0022D), ARESETn can be asserted asynchronously, meaning it can transition to a LOW state without…