Cortex-M0+ JTAG State Stuck in ‘X’ During Simulation with nTRST High
JTAG State Persistence in Simulation Despite TMS Reset Attempts When working with the ARM Cortex-M0+ processor, a common issue arises during simulation where the JTAG state remains stuck in an undefined state (‘X’) despite attempts to reset it synchronously through the TMS pin while nTRST is tied high. This behavior contradicts the Cortex-M0+ integration guide,…