ARM Cortex-A8 NEON memcpy() Hangs During DMA Buffer Operations
The ARM Cortex-A8 processor, known for its efficient handling of multimedia and signal processing tasks, leverages the NEON SIMD (Single Instruction, Multiple Data) engine to accelerate data-intensive operations. However, when using NEON instructions to perform memory copy operations (memcpy()) into a DMA (Direct Memory Access) buffer, the system may hang, particularly during the second cycle of data transfer. This issue is observed when the memcpy() function, optimized with NEON instructions, attempts to copy data from normal memory into an uncached, mmap-ed DMA buffer. The hang occurs specifically in the __memcpy_neon routine, often at the strmi instruction, while simpler, non-NEON implementations of memcpy() work without issues.
The problem is exacerbated when using NEON memory copy instructions such as VLDM (Vector Load Multiple) and VSTM (Vector Store Multiple), even with preload instructions (PLD). This suggests a potential conflict between the NEON engine’s access patterns and the DMA buffer’s uncached memory attributes. The issue is reproducible on a DM8148 CPU running Linux 2.6.37 with glibc 2.23 and gcc 6.3.1 (Linaro). Understanding the root cause requires a deep dive into the interaction between NEON instructions, cache coherency, and DMA buffer memory attributes.
NEON Memory Access Patterns and DMA Buffer Uncached Attributes
The primary cause of the hang lies in the interaction between the NEON engine’s memory access patterns and the uncached nature of the DMA buffer. NEON instructions, such as VLDM and VSTM, are designed to operate on cached memory, where data is fetched and stored in chunks aligned with the cache line size. When these instructions are used on uncached memory, such as a DMA buffer, the processor may encounter undefined behavior due to the lack of cache coherency mechanisms.
The DMA buffer, being mmap-ed and marked as uncached, bypasses the CPU cache, meaning that every memory access directly interacts with the physical memory. This direct access can lead to timing issues and race conditions when combined with NEON instructions, which assume cached memory behavior. Specifically, the VLDM instruction, which loads multiple NEON registers from memory, may stall indefinitely if the memory subsystem cannot fulfill the request due to the uncached attribute.
Additionally, the PLD (Preload Data) instruction, intended to prefetch data into the cache, is ineffective on uncached memory. This further exacerbates the issue, as the NEON engine expects preloaded data to be available in the cache, but the uncached DMA buffer does not support this behavior. The combination of these factors leads to the observed hang during the second cycle of memcpy().
Another contributing factor is the alignment of the DMA buffer and the data being copied. While the original post mentions that alignment issues were tested and ruled out, it is worth noting that NEON instructions have specific alignment requirements for optimal performance. Misaligned access to uncached memory can cause additional latency or even faults, though this is less likely to be the root cause in this scenario.
Finally, the Cortex-A8’s memory system architecture plays a role. The Cortex-A8 employs a Harvard architecture with separate instruction and data caches, and the NEON engine shares the data cache with the CPU. When accessing uncached memory, the NEON engine’s behavior is not well-defined, as it assumes cached memory semantics. This mismatch between expected and actual memory behavior is a key factor in the observed hang.
Resolving NEON memcpy() Hangs on DMA Buffers
To resolve the issue of memcpy() hanging when using NEON instructions on a DMA buffer, several steps can be taken to ensure proper interaction between the NEON engine and uncached memory. These steps involve modifying the memory access patterns, ensuring proper cache management, and potentially using alternative memory copy mechanisms.
Implementing Data Synchronization Barriers
One of the first steps is to ensure proper synchronization between the CPU, NEON engine, and DMA controller. Data Synchronization Barriers (DSB) and Instruction Synchronization Barriers (ISB) can be used to enforce ordering of memory operations. By inserting a DSB instruction before and after the NEON memory copy routine, the processor ensures that all previous memory accesses are completed before proceeding. This can prevent the NEON engine from stalling due to incomplete memory operations.
DSB ; Ensure all previous memory accesses are complete
VLDM r1!, {d0-d7} ; Load NEON registers from memory
VSTM r0!, {d0-d7} ; Store NEON registers to memory
DSB ; Ensure all memory accesses are complete before continuing
Disabling NEON Optimizations for Uncached Memory
Since the NEON engine is optimized for cached memory, it may be necessary to disable NEON optimizations when working with uncached DMA buffers. This can be achieved by using a non-NEON implementation of memcpy() for DMA buffer operations. While this approach sacrifices performance, it ensures reliable operation.
void memcpy_dma(void *dest, const void *src, size_t n) {
// Use a simple byte-by-byte copy for uncached memory
char *d = (char *)dest;
const char *s = (const char *)src;
for (size_t i = 0; i < n; i++) {
d[i] = s[i];
}
}
Cache Management and Invalidation
Proper cache management is critical when working with DMA buffers. Before performing a memory copy into a DMA buffer, the cache lines corresponding to the buffer should be invalidated to ensure that the NEON engine accesses the most recent data from memory. This can be done using the cacheflush system call or by manually invalidating the cache lines.
#include <sys/cachectl.h>
void prepare_dma_buffer(void *addr, size_t size) {
// Invalidate cache lines for the DMA buffer
cacheflush(addr, size, DCACHE);
}
Using Alternative Memory Copy Libraries
If the above steps do not resolve the issue, consider using alternative memory copy libraries that are specifically designed for uncached memory. Libraries such as libcma or custom implementations that avoid NEON instructions can provide a more reliable solution for DMA buffer operations.
Profiling and Debugging
Finally, profiling and debugging the memory access patterns can provide insights into the root cause of the hang. Tools such as gdb and perf can be used to trace the execution of the memcpy() function and identify the exact point of failure. Additionally, enabling hardware performance counters can help monitor cache misses and memory access latency, providing further clues to the issue.
By following these steps, the issue of memcpy() hanging on NEON instructions when accessing DMA buffers can be effectively resolved, ensuring reliable and efficient memory operations on the ARM Cortex-A8 processor.
