ARM Cortex-A9 Bare Metal CPU Frequency Measurement Challenges

Cortex-A9 CNTFRQ Register Absence and Frequency Measurement

The ARM Cortex-A9 processor, widely used in embedded systems, does not include the CNTFRQ (Counter Frequency) register, which is typically used to determine the CPU frequency in other ARM architectures. This absence complicates the process of measuring the CPU frequency in bare-metal applications, where direct access to hardware registers is required. The CNTFRQ register is part of the ARM Generic Timer architecture, which is not implemented in the Cortex-A9. Instead, the Cortex-A9 relies on a different mechanism for timing and frequency measurement, which involves reading and interpreting PLL (Phase-Locked Loop) registers.

The PLL registers are device-specific and are used to configure and control the clock generation circuitry on the SoC (System on Chip). These registers determine the frequency of the CPU clock, as well as other clocks within the system. To measure the CPU frequency on a Cortex-A9, one must read and interpret these PLL registers, which requires a deep understanding of the specific SoC’s clock architecture. This process is not straightforward and involves multiple steps, including setting up the PLLs, reading the appropriate registers, and performing calculations to derive the CPU frequency.

PLL Register Configuration and Clock Source Identification

The primary cause of difficulty in measuring the CPU frequency on a Cortex-A9 in a bare-metal environment is the need to interact with the PLL registers. These registers are part of the clock management unit (CMU) or clock control unit (CCU) of the SoC, and their configuration is highly specific to the device. The PLLs generate the clock signals used by the CPU and other peripherals, and their configuration determines the frequency of these signals.

In the case of the Intel Arria V SoC, which uses the Cortex-A9 as its CPU, the PLL registers are part of the Hard Processor System (HPS). The HPS includes multiple PLLs, each responsible for generating different clock signals. To determine the CPU frequency, one must identify which PLL is responsible for generating the CPU clock and then read the appropriate registers to determine the current configuration of that PLL.

The PLL configuration typically includes parameters such as the input clock frequency, the multiplication factor, and the division factor. These parameters are used to calculate the output frequency of the PLL, which is the CPU clock frequency. However, the exact method for calculating the CPU frequency from these parameters varies depending on the specific PLL and SoC architecture. This requires a detailed understanding of the SoC’s clock architecture and the ability to interpret the PLL register values correctly.

Reading PLL Registers and Calculating CPU Frequency

To measure the CPU frequency on a Cortex-A9 in a bare-metal environment, the following steps must be taken:

1. Identify the PLL responsible for the CPU clock: The first step is to determine which PLL generates the CPU clock. This information is typically found in the SoC’s technical reference manual (TRM). For the Intel Arria V SoC, the HPS includes multiple PLLs, and the CPU clock is generated by the Main PLL (MPLL). The TRM provides detailed information on the MPLL’s register map and configuration.

2. Read the PLL configuration registers: Once the correct PLL has been identified, the next step is to read the configuration registers for that PLL. These registers contain the parameters needed to calculate the PLL’s output frequency. For the MPLL on the Arria V SoC, the key registers include the PLL control register, the PLL divider register, and the PLL multiplication register. These registers contain the input clock frequency, the multiplication factor, and the division factor, respectively.

3. Calculate the CPU frequency: With the PLL configuration registers read, the next step is to calculate the CPU frequency. The general formula for calculating the output frequency of a PLL is:

   [
   \text{Output Frequency} = \frac{\text{Input Frequency} \times \text{Multiplication Factor}}{\text{Division Factor}}
   ]

   For the MPLL on the Arria V SoC, the input frequency is typically the frequency of the external oscillator or crystal connected to the SoC. The multiplication and division factors are determined by the values in the PLL configuration registers. Once these values are known, the CPU frequency can be calculated using the above formula.

4. Verify the calculated frequency: After calculating the CPU frequency, it is important to verify the result to ensure accuracy. This can be done by comparing the calculated frequency with the expected frequency based on the SoC’s specifications. If the calculated frequency does not match the expected frequency, it may be necessary to re-examine the PLL configuration registers and the calculation process to identify any errors.

5. Implement the frequency measurement in code: Once the process for calculating the CPU frequency is understood, it can be implemented in code. This involves writing bare-metal code to read the PLL configuration registers, perform the necessary calculations, and output the CPU frequency. The code must be written in a way that is specific to the SoC and the development environment being used. For the Arria V SoC, this would involve writing code in C or assembly language to interact with the HPS registers and perform the calculations.

6. Debugging and optimization: After implementing the frequency measurement code, it is important to debug and optimize the code to ensure it runs correctly and efficiently. This may involve using a debugger to step through the code and verify the values of the PLL configuration registers, as well as optimizing the code to minimize the time required to calculate the CPU frequency.

In conclusion, measuring the CPU frequency on a Cortex-A9 in a bare-metal environment is a complex task that requires a deep understanding of the SoC’s clock architecture and the ability to interact with the PLL registers. By following the steps outlined above, it is possible to accurately determine the CPU frequency and implement this functionality in a bare-metal application. However, this process is highly specific to the SoC being used and requires careful attention to detail to ensure accurate results.