Porting existing LCD drivers to new Cortex M0+ MCUs

Upgrading to a new microcontroller (MCU) can provide benefits like better performance, more memory, and new features. However, it often requires porting existing peripheral drivers like LCD controllers to work with the new MCU. This article provides guidance on porting LCD drivers to new Cortex M0+ based MCUs. Overview of the Cortex M0+ Architecture The

Parallel interfacing for LCD displays with Cortex M0+

Interfacing an LCD display in parallel mode with a Cortex M0+ microcontroller provides a simple and efficient way to drive the LCD while minimizing utilization of the microcontroller’s limited I/O pins. The Cortex M0+ parallel interface uses 8 data pins and 3 control pins to send characters and commands to the LCD display. Overview of

LCD Interfacing with ARM Cortex M0+ LPC845

The LPC845 is an ARM Cortex M0+ based microcontroller from NXP Semiconductors. It is an extremely low cost and low power microcontroller that is well suited for a wide range of embedded applications. The Cortex M0+ architecture provides good performance while maintaining low power consumption, making it ideal for battery powered and energy sensitive devices.

Keil RTX configuration like osFeature flags in cmsis_os.h

The osFeature flags in cmsis_os.h allow developers to configure and customize the CMSIS-RTOS API for their specific application requirements. Similarly, Keil RTX provides configuration options to enable or disable certain RTOS features. By setting these configuration options, developers can optimize Keil RTX and reduce memory footprint for resource constrained devices. Keil RTX Configuration Keil RTX

Differences between osDelay() and osWait() calls in Keil RTX

The osDelay() and osWait() functions are used for creating delays and waiting in embedded systems programmed with Keil RTX. Both functions are useful for implementing timing requirements, synchronization, timeouts, polling loops, and blocking operations. However, there are some key differences between the two that developers should understand. osDelay() The osDelay() function is used to create

Configuration and optimization of threads and stacks for Keil RTX and Cortex-M0+

Configuring and optimizing threads and stacks for the Keil RTX real-time operating system (RTOS) when using the ARM Cortex-M0+ microcontroller can improve performance and resource utilization. The key considerations are configuring the number of threads, stack size for each thread, kernel tick frequency, thread priorities, and utilizing stack watermarking. Overview of Keil RTX and Cortex-M0+

Importance of Adequate Stack Size for Threads in Keil RTX

When developing multithreaded applications using Keil RTX, one important consideration is setting the stack size for each thread appropriately. Choosing a stack size that is too small can lead to stack overflow errors and unpredictable program behavior. On the other hand, setting the stack size much larger than needed wastes valuable RAM resources, especially on

End User Agreement Licence for the Cortex-M0 DesignStart Eval

The Cortex-M0 DesignStart Eval is an evaluation version of ARM’s Cortex-M0 processor targeted at microcontroller applications. It allows developers to evaluate the Cortex-M0 processor before deciding to license and integrate it into their own custom system-on-chip (SoC) designs. Like all ARM processor IP, the Cortex-M0 DesignStart Eval comes with an end user agreement that outlines