Author: Ryan Ryan

The Cortex-M processors from ARM only support the Thumb-16 instruction set. By default, the GCC compiler will generate a mix of 32-bit Thumb-2 and 16-bit Thumb instructions when compiling code for Cortex-M. However, it is possible to force GCC to emit only 16-bit Thumb instructions using compiler flags. Why limit code to Thumb-16 on Cortex-M?

A soft reset is a common troubleshooting technique used with Cortex-M0 microcontrollers to clear errors and reset the device to a known good state without fully powering down. However, some users have reported issues where the Cortex-M0 appears to hang or become unresponsive after a soft reset is performed. What causes the Cortex-M0 to hang

The stack pointer (SP) and link register (LR) are important registers used for function calls and returns in ARM processors. The SP points to the top of the stack, while the LR stores the return address when a function call is made. Stack Pointer (SP) The stack is a region of memory used for temporary

Embedded systems rely on a bootloader and startup code to initialize the hardware and software components and get the system up and running. The bootloader is a small piece of code that runs when the system first powers on and gets things started. The startup code then takes over and completes the system initialization before

When an ARM-based system powers on, there are several key software components that run to initialize the hardware and prepare the system for operation. Understanding the differences between these components – the bootloader, startup code, and bootstrap loader – is important for developers working on low-level software. Bootloader The bootloader is the first piece of

The reset sequence in ARM Cortex-M0 microcontrollers involves several steps that initialize the processor and peripherals to a known state. On power-up or when a reset pin is asserted, the Cortex-M0 goes through the following reset sequence: 1. Processor Reset When the power supply ramps up or the reset pin is asserted, the processor immediately

The reset vector address of ARM Cortex-M0 is 0x00000000. This is the memory address that the processor will start executing code from after a reset. Introduction to ARM Cortex-M0 The ARM Cortex-M0 is a 32-bit RISC processor core designed for microcontroller applications. It is one of the most basic and lowest power member of the

The short answer is yes, QEMU can run on ARM processors. QEMU is an open source machine emulator and virtualizer that allows you to run operating systems and programs for one machine on a different machine. So QEMU can be used to run software compiled for x86 CPUs on an ARM device, and vice versa.

The ARM Cortex-M0 and Cortex-M0+ are two of ARM’s most popular low power microcontroller cores. Both are 32-bit RISC processors designed for embedded applications requiring high efficiency and low cost. The Cortex-M0+ is an evolution of the Cortex-M0 with improvements in performance, power consumption and features. Key Differences Here are some of the main differences

A watchdog timer (WDT) is an essential component in real-time embedded systems, especially in multitasking environments. It provides a recovery mechanism to detect and handle system malfunctions. This article explains the role, working, and implementation of a general purpose WDT module suitable for multitasking systems using ARM Cortex processors. Role of a Watchdog Timer A