Understanding ETM Trace Data Flush Behavior in Cortex-M33
The Embedded Trace Macrocell (ETM) in ARM Cortex-M33 processors is a powerful tool for real-time instruction and data tracing, enabling developers to capture and analyze program execution flow. However, a critical issue arises when the trace data generated just before a program break is less than 16 bytes. According to the ARM CoreSight Architecture Specification v3.0, specifically section "D4.4 Flush of trace data at the end of operation," the ETM is designed to store 16 bytes of data during a flush operation. However, in practice, only the actual trace data (Real Data) is stored, leaving the remaining bytes undefined or padded. This discrepancy can lead to incomplete or incorrect trace decoding, particularly when the trace data is less than 16 bytes.
The TPIU (Trace Port Interface Unit) formatter, which processes the ETM output, expects a 16-byte aligned data packet. When the trace data is less than 16 bytes, the TPIU formatter may not correctly interpret the correction data or padding, leading to potential decoding errors. This issue is particularly problematic in scenarios where precise trace data is required for debugging, such as in safety-critical systems or real-time applications.
Root Causes of ETM Trace Data Flush and Decoding Issues
The primary cause of this issue lies in the interaction between the ETM and the TPIU formatter. The ETM is designed to flush trace data in 16-byte chunks, but when the actual trace data is less than 16 bytes, the remaining bytes are either padded or left undefined. This behavior is not explicitly documented in the ARM CoreSight Architecture Specification, leading to ambiguity in how the TPIU formatter should handle such cases.
Another contributing factor is the timing of the trace data flush relative to the program break. When a program break occurs, the ETM may not have enough time to complete the 16-byte flush operation, resulting in incomplete trace data. This is particularly true in high-frequency systems where the timing margins are tight.
Additionally, the lack of explicit guidance on how to handle sub-16-byte trace data in the ARM documentation exacerbates the issue. Developers are left to infer the correct behavior, which can lead to inconsistent implementations and potential decoding errors.
Resolving ETM Trace Data Flush and Decoding Issues
To address the issue of acquiring and decoding ETM trace data that is less than 16 bytes just before a program break, developers must take a systematic approach that involves both hardware and software considerations.
Implementing Proper Trace Data Flush Handling
The first step is to ensure that the ETM is configured to handle trace data flushes correctly. This involves setting the appropriate flags in the ETM control registers to enable automatic flushing of trace data when a program break occurs. Developers should also ensure that the ETM is configured to generate the necessary synchronization packets, which can help the TPIU formatter correctly interpret the trace data.
Modifying the TPIU Formatter Behavior
The TPIU formatter must be configured to handle sub-16-byte trace data correctly. This can be achieved by modifying the formatter’s configuration registers to expect and process incomplete trace data packets. Developers should also consider implementing custom logic in the TPIU formatter to handle padding bytes or undefined data, ensuring that the trace data is correctly interpreted.
Using Data Synchronization Barriers
Data synchronization barriers (DSBs) can be used to ensure that the ETM completes its trace data flush operation before the program break occurs. By inserting DSBs at strategic points in the code, developers can ensure that the ETM has enough time to complete the flush operation, reducing the likelihood of incomplete trace data.
Implementing Custom Trace Decoding Logic
In cases where the standard TPIU formatter behavior cannot be modified, developers may need to implement custom trace decoding logic. This involves writing software that can interpret the raw trace data, including any padding or undefined bytes, and reconstruct the original trace data. This approach requires a deep understanding of the ETM trace data format and the ability to parse and decode the trace data accurately.
Leveraging ARM CoreSight Tools
ARM provides a suite of CoreSight tools that can be used to analyze and debug ETM trace data. These tools can help developers identify issues with trace data flushes and decoding, providing insights into how the ETM and TPIU formatter are interacting. By leveraging these tools, developers can gain a better understanding of the trace data and identify potential issues before they become critical.
Example Configuration Table
The following table provides an example configuration for the ETM and TPIU formatter to handle sub-16-byte trace data:
| Register | Setting | Description |
|---|---|---|
| ETMCR (ETM Control) | Enable Trace, Enable Flush | Enables trace data generation and automatic flushing on program break. |
| ETMFFLR (Flush Control) | Set Flush Threshold to 16 bytes | Configures the ETM to flush trace data in 16-byte chunks. |
| TPIUFFCR (Formatter) | Enable Custom Padding Handling | Configures the TPIU formatter to handle sub-16-byte trace data correctly. |
| DSB (Data Sync Barrier) | Insert DSB before program break | Ensures the ETM completes the flush operation before the program break. |
Conclusion
Acquiring and decoding ETM trace data that is less than 16 bytes just before a program break is a complex issue that requires a deep understanding of the ARM CoreSight architecture and the interaction between the ETM and TPIU formatter. By implementing proper trace data flush handling, modifying the TPIU formatter behavior, using data synchronization barriers, and leveraging ARM CoreSight tools, developers can ensure that trace data is accurately captured and decoded, even in challenging scenarios. This approach not only resolves the immediate issue but also provides a robust framework for handling similar challenges in future projects.
