ARMv-A Base RevC FVP PCI and AHCI Initialization Failures
The ARMv-A Base RevC FVP (Fixed Virtual Platform) is a powerful tool for simulating ARM-based systems, enabling developers to test and validate their designs before committing to silicon. One common use case involves configuring PCI and AHCI controllers to mount a SATA disk for external storage. However, this process can encounter several pitfalls, particularly when dealing with device tree configurations, IOMMU/SMMU settings, and AHCI controller initialization. The core issue revolves around the system’s inability to recognize the PCI bus and AHCI controller, leading to the SATA disk not being mounted. This problem is often exacerbated by incomplete or incorrect device tree source (DTS) configurations, which are critical for proper hardware initialization in ARM-based systems.
The PCI and AHCI controllers are integral components for enabling SATA disk functionality. The PCI controller manages the bus communication, while the AHCI controller handles the SATA disk interface. When these components fail to initialize correctly, the system cannot detect the SATA disk, resulting in errors such as empty lspci outputs and missing disk entries in lsblk. The root cause often lies in the device tree configuration, which must accurately describe the hardware topology, including the PCI bus, AHCI controller, and any associated IOMMU/SMMU settings.
Incomplete Device Tree Configuration and IOMMU/SMMU Misalignment
The primary cause of PCI and AHCI initialization failures in the ARMv-A Base RevC FVP is an incomplete or misconfigured device tree source (DTS) file. The device tree is a data structure that describes the hardware components of the system, including their addresses, interrupts, and dependencies. In this context, the PCI and AHCI controllers must be explicitly defined in the DTS file, along with any necessary IOMMU/SMMU configurations. Failure to include these definitions results in the system being unaware of the hardware, leading to initialization failures.
The PCI controller configuration in the DTS file must specify the base address, interrupt mappings, and bus ranges. Additionally, the AHCI controller must be correctly linked to the PCI bus, with proper interrupt and DMA settings. The IOMMU/SMMU configuration is equally critical, as it manages memory translations and protections for devices connected to the PCI bus. If the IOMMU/SMMU is not correctly configured, the AHCI controller may encounter errors during initialization, such as timeouts or I/O errors.
Another common issue is the misalignment between the IOMMU/SMMU settings and the PCI/AHCI configurations. The IOMMU/SMMU must be properly mapped to the PCI bus and AHCI controller, with correct interrupt and DMA settings. If these mappings are incorrect or missing, the system may fail to initialize the AHCI controller, resulting in errors such as qc timeout or failed to IDENTIFY.
Correcting Device Tree Configurations and Resolving IOMMU/SMMU Errors
To resolve PCI and AHCI initialization failures in the ARMv-A Base RevC FVP, the device tree configuration must be thoroughly reviewed and corrected. The following steps outline the necessary corrections and troubleshooting procedures:
Step 1: Verify and Update the PCI Controller Configuration
The PCI controller configuration in the DTS file must include the following key elements:
- Base address and size of the PCI controller.
- Bus ranges and interrupt mappings.
- Compatibility strings to ensure the correct driver is loaded.
For example, the PCI controller configuration should resemble the following:
pci: pci@40000000 {
#address-cells = <0x3>;
#size-cells = <0x2>;
#interrupt-cells = <0x1>;
compatible = "pci-host-ecam-generic";
device_type = "pci";
bus-range = <0x0 0x1>;
reg = <0x0 0x40000000 0x0 0x10000000>;
ranges = <0x2000000 0x0 0x50000000 0x0 0x50000000 0x0 0x10000000>;
interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0xa8 0x4>,
<0x0 0x0 0x0 0x2 &gic 0x0 0x0 0xa9 0x4>,
<0x0 0x0 0x0 0x3 &gic 0x0 0x0 0xaa 0x4>,
<0x0 0x0 0x0 0x4 &gic 0x0 0x0 0xab 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
msi-parent = <&its>;
msi-map = <0x0 &its 0x0 0x10000>;
iommu-map = <0x0 &smmu 0x0 0x10000>;
dma-coherent;
ats-supported;
};
Step 2: Configure the AHCI Controller and SATA Disk
The AHCI controller must be correctly linked to the PCI bus and configured with the appropriate interrupt and DMA settings. Additionally, the SATA disk image path must be specified in the FVP launch options. For example:
-C pci.ahci_pci.ahci.image_path=/path/to/1.satadisk
Step 3: Validate IOMMU/SMMU Settings
The IOMMU/SMMU configuration must be aligned with the PCI and AHCI settings. This includes specifying the base address, interrupts, and DMA coherence settings. For example:
smmu: smmu@2b400000 {
compatible = "arm,smmu-v3";
reg = <0x0 0x2b400000 0x0 0x20000>;
interrupts = <0 74 1>, <0 75 1>, <0 77 1>, <0 79 1>;
interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";
dma-coherent;
#iommu-cells = <1>;
msi-parent = <&its 0x10000>;
};
Step 4: Disabling IOMMU (if necessary)
If the IOMMU needs to be disabled, ensure that the no-iommu flag is correctly added to the PCI configuration in the DTS file. However, be aware that disabling the IOMMU may lead to AHCI controller errors, as the system relies on the IOMMU for memory translations and protections. In such cases, additional debugging may be required to identify and resolve any resulting issues.
Step 5: Debugging and Verification
After updating the DTS file and FVP launch options, verify the system’s behavior by checking the following:
- The output of
lspcishould list the PCI bus and AHCI controller. - The output of
lsblkshould include the SATA disk. - System logs should not contain any PCI or AHCI-related errors.
If issues persist, enable verbose logging for the PCI and AHCI drivers to gather more detailed information about the initialization process. This can help identify any remaining misconfigurations or hardware issues.
By following these steps, the PCI and AHCI initialization issues in the ARMv-A Base RevC FVP can be resolved, enabling the successful mounting of a SATA disk for external storage. Proper device tree configuration and alignment between the PCI, AHCI, and IOMMU/SMMU settings are critical for ensuring the system recognizes and initializes the hardware correctly.
