PL330 DMA Scatter-Gather Transfer Issues with MFIFO Alignment and Data Availability Errors

PL330 DMA Scatter-Gather Transfer Failure Due to Misaligned MFIFO Access

The PL330 DMA controller is a highly configurable and powerful component used in systems like the Zynq-7000 SoC for managing data transfers between memory and peripherals. One of its advanced features is the ability to perform scatter-gather transfers, where data is read from a contiguous source and written to non-contiguous destinations in a custom pattern. However, this functionality can be tricky to implement correctly, especially when dealing with the internal MFIFO (Memory FIFO) buffer and alignment requirements.

In the described scenario, a scatter-gather transfer is being attempted using the PL330’s debug instruction registers. The goal is to load a 64-byte block from a source address and scatter the data into a custom mapping in the destination buffer. The process involves using DMALD (DMA Load), DMAST (DMA Store), and DMAADDH (DMA Add Halfword) instructions. However, the third DMAST operation fails with a "st_data_unavailable" error, indicating that the data is not available in the MFIFO for the specified destination address.

The key observation is that the error occurs when the destination address offset added via DMAADDH is not a multiple of 8. For example, adding an offset of 4 bytes fails, while adding an offset of 8 bytes succeeds. This suggests that the MFIFO’s internal alignment and data availability rules are not being respected, leading to the error.

MFIFO Buffer Alignment Constraints and Data Availability Rules

The PL330’s MFIFO is a critical component that temporarily holds data during DMA transfers. It operates under specific alignment and data availability rules that must be adhered to for successful transfers. When performing scatter-gather operations, the MFIFO’s behavior is influenced by the following factors:

1. MFIFO Alignment Requirements: The MFIFO is designed to handle data in chunks that align with its internal structure. For example, if the MFIFO is configured to handle 64-byte blocks, any access to the MFIFO must respect this alignment. Misaligned accesses, such as attempting to store data at an address that is not a multiple of the MFIFO’s block size, can result in errors.

2. Data Availability Rules: The MFIFO ensures that data is available for writing only when it has been fully loaded and aligned correctly. If a DMAST operation attempts to store data that is not yet available in the MFIFO or is misaligned, the PL330 will raise a "st_data_unavailable" error. This is a protective mechanism to prevent data corruption and ensure data integrity.

3. Scatter-Gather Addressing: In scatter-gather mode, the destination addresses are often non-contiguous and may not align with the MFIFO’s block size. This requires careful management of the MFIFO’s data and addressing to ensure that each DMAST operation has access to the correct data at the correct time.

In the described scenario, the issue arises because the DMAADDH instruction is adding an offset of 4 bytes to the destination address, which does not align with the MFIFO’s internal structure. As a result, the third DMAST operation fails because the data is not available in the MFIFO at the misaligned address.

Implementing Proper MFIFO Management and Alignment in Scatter-Gather Transfers

To resolve the "st_data_unavailable" error and ensure successful scatter-gather transfers, the following steps and solutions can be implemented:

1. Respect MFIFO Alignment: Ensure that all destination addresses used in DMAST operations are aligned with the MFIFO’s block size. In this case, the MFIFO is likely configured to handle 64-byte blocks, so all destination addresses should be multiples of 8 bytes (since 64 bytes / 8 bytes = 8). This means that any offset added via DMAADDH should be a multiple of 8.

2. Use DMAADDH with Correct Offsets: Modify the DMAADDH instructions to add offsets that are multiples of 8. For example, instead of adding an offset of 4 bytes, add an offset of 8 bytes. This ensures that the destination address remains aligned with the MFIFO’s block size.

3. Verify Data Availability: Before performing a DMAST operation, ensure that the data is available in the MFIFO. This can be done by checking the MFIFO’s status registers or using DMAWMB (DMA Write Memory Barrier) to synchronize data availability.

4. Optimize Scatter-Gather Patterns: If the scatter-gather pattern requires non-aligned offsets, consider breaking the transfer into multiple aligned transfers. For example, instead of trying to store data at a misaligned address, perform a separate DMAST operation for each aligned chunk of data.

5. Debugging and Error Handling: Implement robust debugging and error handling mechanisms to catch and diagnose "st_data_unavailable" errors. This can include logging the MFIFO’s status and the addresses used in DMAST operations to identify misaligned accesses.

By following these steps, the scatter-gather transfer can be successfully implemented without encountering "st_data_unavailable" errors. Proper management of the MFIFO’s alignment and data availability rules is key to ensuring reliable and efficient DMA transfers in the PL330.

Detailed Example of Corrected Scatter-Gather Transfer Code

To illustrate the correct implementation, here is an example of the corrected scatter-gather transfer code:

DMAMOV SAR, source_address        ; Set source address (aligned on 64 bytes)
DMAMOV DAR, destination_address   ; Set destination address (aligned on 64 bytes)
DMAMOV CCR, SB8 SS8 DB1 DS32      ; Configure transfer: 64-byte blocks, src_inc = 1, dst_inc = 1

DMALD                              ; Load 64-byte block into MFIFO
DMAST                              ; Store first 32-bit word
DMAST                              ; Store second 32-bit word
DMAADDH DAR, 8                     ; Add offset of 8 bytes (aligned with MFIFO block size)
DMAST                              ; Store third 32-bit word (now aligned)
DMAWMB                             ; Write Memory Barrier to ensure data availability
DMASEV e3                          ; Signal event 3
DMAEND                             ; End DMA transfer

In this corrected example, the DMAADDH instruction adds an offset of 8 bytes, ensuring that the destination address remains aligned with the MFIFO’s block size. This prevents the "st_data_unavailable" error and allows the third DMAST operation to succeed.

Conclusion

The PL330 DMA controller’s scatter-gather transfer functionality is a powerful tool for managing complex data transfers. However, it requires careful attention to the MFIFO’s alignment and data availability rules to avoid errors like "st_data_unavailable." By respecting these rules and implementing proper MFIFO management, developers can ensure reliable and efficient DMA transfers in their embedded systems.