Arm

FreeRTOS is a popular real-time operating system (RTOS) used in many embedded systems. One key feature of FreeRTOS is its ability to quickly switch between different tasks using a context switch. The context switch time is an important metric that impacts real-time performance. In short, the context switch time refers to the time it takes…

A context switch is a fundamental part of multitasking real-time operating systems like FreeRTOS. It allows multiple tasks to share a single CPU core while ensuring each task appears to have full and exclusive access to the CPU. When a context switch occurs, the state of the current task is saved and the state of…

Real-time operating systems (RTOS) are designed to execute application tasks in a timely and predictable manner. One key mechanism that enables real-time responsiveness in RTOS is context switching. Context switching allows the CPU to pause execution of one task and resume execution of another task in a seamless and efficient manner. The ability to rapidly…

Lazy context switching is a technique used in operating systems and processors like ARM to improve performance and reduce overhead associated with context switches. A context switch refers to the process of storing and restoring the state of a CPU so that execution can be resumed from the same point at a later time. This…

The ARM Cortex-M4 processor has a flexible and configurable interrupt handling system that allows developers to respond quickly and efficiently to events. Interrupts are a key part of embedded systems programming and proper configuration is necessary for robust and responsive applications. Cortex-M4 Interrupt Sources There are several potential sources of interrupts in the Cortex-M4 system:…

The Cortex-M interrupt stack is a key part of how interrupts are handled on Cortex-M processors. It provides a dedicated stack for storing context during interrupt handling so that the main stack is not disrupted. Understanding how the interrupt stack works is important for Cortex-M firmware developers to properly leverage interrupts and write interrupt handlers….

The EPSR (External Physical State Register) is a 32-bit register present in ARM Cortex processors that indicates the current physical state of the processor. It provides information about the instruction set state, endian state, overflow and carry flag values, and more. Understanding the layout and meaning of the bits in the EPSR register is important…

The ARM calling convention refers to how function arguments are passed and return values are handled when making function calls in ARM assembly language. Understanding the ARM calling convention is important for writing efficient and compliant assembly code that can properly interface with other functions. In the ARM calling convention, the first 4 integer or…

The ARM Cortex-M3 is a 32-bit RISC processor core licensed by ARM Holdings. It is part of the Cortex-M series of embedded microcontroller cores, and is designed for low-power and low-cost applications. Some key features of the Cortex-M3 core include: Architecture Overview The Cortex-M3 implements the ARMv7-M architecture profile, which includes Thumb-2 technology for improved…

The Cortex-M0 is an ARM processor core designed for microcontroller applications. It is an extremely small and low power core aimed at devices with limited memory and processing requirements. The Cortex-M0 has a very modest amount of memory compared to higher-end Cortex-M cores. On-Chip Memory The Cortex-M0 processor itself does not contain any on-chip memory….