Author: Mike Johnston

Serial Wire Viewer (SWV) is a real-time trace functionality that is available in Arm Cortex-M microcontrollers. It allows real-time data to be transmitted from the Cortex-M CPU to an external debug probe, which can capture the data for viewing and analysis on a host computer. The key benefit of SWV is that it enables non-intrusive

The Cortex-A76 is ARM’s latest high-performance CPU core designed for mobile computing. It offers substantial improvements in performance and power efficiency over previous ARM cores like the Cortex-A73 and Cortex-A75. The Cortex-A76 is found in some of the latest system-on-chips (SoCs) used in smartphones, tablets and other mobile devices from companies like HiSilicon, Samsung and

When deciding whether to use hardware or software floating point with Arm Cortex M processors, there are a few key factors to consider. Hardware floating point support provides faster floating point math performance, while software floating point gives more flexibility and portability. The choice depends on the application requirements and constraints. Introduction to Floating Point

The ARM Cortex-M3 is a 32-bit processor core licensed by ARM Holdings. It is part of the Cortex-M series of cores, and is designed for embedded applications requiring high performance and low power consumption. The Cortex-M3 core has a 3-stage pipeline and includes features like Thumb-2 instruction set, optional Memory Protection Unit (MPU), and nested

The ARM Cortex-M series of processors are very popular in embedded systems and IoT devices due to their low power consumption, good performance and wide tool support. However, working on the real hardware for testing and development can be expensive and time consuming. This is where QEMU comes in – it allows you to simulate

The Cortex-M3 is an ARM processor core designed for embedded and IoT applications. It is part of ARM’s Cortex-M series of cores, which are optimized for low-power consumption and high efficiency in resource-constrained devices. The Cortex-M3 operates at a maximum clock frequency of 100 MHz. Overview of the Cortex-M3 The Cortex-M3 CPU was first introduced

The STM32F1 microcontroller based on the Cortex-M3 core contains several boot modes that allow booting from different memory locations. One of these modes is booting from System RAM (SRAM) which can be useful for quickly testing code without needing to flash memory. To enter SRAM boot mode, specific “magic” values need to be written to

The ARM Cortex M3 processor provides hardware support for atomic bit manipulation through its bit-banding feature. This allows developers to safely set, clear or toggle individual bits in memory without the need for locks or other synchronization primitives. The bit-banding hardware acts as an atomic read-modify-write cycle, ensuring thread safety for bit manipulation operations. Overview

The Cortex-M1 processor from ARM is a popular 32-bit RISC CPU that is widely used in embedded systems. It combines microcontroller features with DSP capabilities, making it well-suited for real-time applications. To aid in development and debugging of Cortex-M1 based systems, Segger Microcontroller offers the ULINK2 debugger. Using the ULINK2 debugger with the Cortex-M1 processor

When compiling code for the ARM Cortex-M1 using the Keil compiler, you may encounter an error saying “Symbol ferror multiply defined”. This error occurs when there are multiple conflicting definitions for the ferror symbol, resulting in a compile-time error. The ferror symbol refers to the standard C library function ferror(), which returns the error status