LCD Interfacing with ARM Cortex M0+ LPC845

The LPC845 is an ARM Cortex M0+ based microcontroller from NXP Semiconductors. It is an extremely low cost and low power microcontroller that is well suited for a wide range of embedded applications. The Cortex M0+ architecture provides good performance while maintaining low power consumption, making it ideal for battery powered and energy sensitive devices….

Keil RTX configuration like osFeature flags in cmsis_os.h

The osFeature flags in cmsis_os.h allow developers to configure and customize the CMSIS-RTOS API for their specific application requirements. Similarly, Keil RTX provides configuration options to enable or disable certain RTOS features. By setting these configuration options, developers can optimize Keil RTX and reduce memory footprint for resource constrained devices. Keil RTX Configuration Keil RTX…

Differences between osDelay() and osWait() calls in Keil RTX

The osDelay() and osWait() functions are used for creating delays and waiting in embedded systems programmed with Keil RTX. Both functions are useful for implementing timing requirements, synchronization, timeouts, polling loops, and blocking operations. However, there are some key differences between the two that developers should understand. osDelay() The osDelay() function is used to create…

Configuration and optimization of threads and stacks for Keil RTX and Cortex-M0+

Configuring and optimizing threads and stacks for the Keil RTX real-time operating system (RTOS) when using the ARM Cortex-M0+ microcontroller can improve performance and resource utilization. The key considerations are configuring the number of threads, stack size for each thread, kernel tick frequency, thread priorities, and utilizing stack watermarking. Overview of Keil RTX and Cortex-M0+…

Importance of Adequate Stack Size for Threads in Keil RTX

When developing multithreaded applications using Keil RTX, one important consideration is setting the stack size for each thread appropriately. Choosing a stack size that is too small can lead to stack overflow errors and unpredictable program behavior. On the other hand, setting the stack size much larger than needed wastes valuable RAM resources, especially on…

End User Agreement Licence for the Cortex-M0 DesignStart Eval

The Cortex-M0 DesignStart Eval is an evaluation version of ARM’s Cortex-M0 processor targeted at microcontroller applications. It allows developers to evaluate the Cortex-M0 processor before deciding to license and integrate it into their own custom system-on-chip (SoC) designs. Like all ARM processor IP, the Cortex-M0 DesignStart Eval comes with an end user agreement that outlines…

GNU-ARM Compiler Performance for Cortex-M0/M1

The GNU Arm Embedded Toolchain provides a complete open source toolchain for the Arm Cortex-M family of processors. The GNU compiler for Arm (GCC) offers various levels of optimization that can significantly improve the performance and code size of applications running on Cortex-M0/M1 microcontrollers. Overview of Cortex-M0/M1 Processors The Cortex-M0 and Cortex-M1 processors are Arm’s…

Assessing Code Safety with GNU-ARM for Cortex-M0/M1

The GNU ARM Embedded Toolchain provides a robust set of tools for developing, testing, and debugging ARM Cortex-M0/M1 based applications. One of the key features it offers is the ability to perform comprehensive code safety assessments using the GNU-ARM tools included in the toolchain. Code safety refers to detecting potential bugs, errors or vulnerabilities in…